Search - RISC CPU

[Other] risc

Description: RISCCPU的边界扫描电路设计与实现欢迎下载-cpu
Platform: | Size: 844800 | Author: yzhang | Hits:

[Other] PipelineCPU

Description: Quartus II 7.2环境中，采用硬件描述语言VHDL独立完成了基于MIPS指令集的32位RISC处理器的逻辑设计-quartusII mips pipeline 32bit cpu design
Platform: | Size: 847872 | Author: znl | Hits:

Description: uCos在s1c33上的移植 S1C33 MCU EPSON最新的32位微处理器系列，专用于需要高级数据处理的便捷设备。 CPU性能核心CPU 精工EPSON32位的RISC CPU，32位内部数据处理 33MHz 105条16位固定长度的指令 16个32位多用途的寄存器在60MHZ操作下的最小指令执行时间为16.7ns 乘法、除法和MAC指令内存 0~128K ROM 8K RAM 片内周边电路晶振电路 32.769K~33MHz 定时器 8位6道 16位6道和带告警功能的时钟各1道计数器 4道，可选择时钟同步系统、异步系统、或IrDA接口 A/D转换 10位8通道 DMA 4道高速DMA 128道IDMA 通用 I/O 13位输入端口和29位I/O端口片内周边电路可编程时钟产生器 Prescaler 8位可编程定时器 6道 16位可编程定时器 6道时钟定时器 1道串口 4道 I/O端口 13位+29位 A/D转换器 ADC 直接存储器存取 DMA -S1C33 MCU EPSON latest 32-bit microprocessor series, dedicated to the convenience needs of advanced data processing equipment. CPU performance Seiko EPSON32 bit core CPU RISC CPU, 32-bit internal data processing 33MHz 105 16-bit fixed length instruction 16 multi-purpose 32-bit registers In 60MHZ operation, the minimum instruction execution time of 16.7ns Multiplication, division and the MAC Directive Memory, 0 ~ 128K ROM 8K RAM On-chip peripheral circuits 32.769K ~ 33MHz crystal oscillator circuit Timer 8 6 16 6 and clock with alarm function of each one Counter 4, optional clock synchronous system, asynchronous systems, or IrDA interfaces A/D converter 10-bit 8-channel DMA 4 道 high-speed DMA 128 道 IDMA Universal I/O 13-bit input ports and 29 I/O ports On-chip peripheral circuits Programmable Clock Generator Prescaler 8-bit programmable timer 6 16-bit programmable timer 6 Clock Timer 1 Serial 4 I/O port 13+29 bit A/D converter ADC Direct
Platform: | Size: 10240 | Author: dupeng | Hits:

[Technology Management] cpudeliushuixianjiegou

Description: 根据流水线的基本原理 ,阐述了64位 RISC CPU的5级流水线结构和功能.重点介绍了流水线的功能单元以及各单元的基本操作流水线暂停和异常的处理方法 -According to the basic principles of line, 64-bit RISC CPU described the 5-stage pipeline structure and function. Focuses on the assembly line of functional units and the basic operation of each unit line suspension and unusual treatment
Platform: | Size: 239616 | Author: chen | Hits:

[VHDL-FPGA-Verilog] RISC_CPU

Description: 利用VHDL实现risc cpu，IPcode 的risc cpu-Using VHDL implementation risc cpu, IPcode the risc cpu
Platform: | Size: 574464 | Author: liwei | Hits:

[VHDL-FPGA-Verilog] VerilogHDLexample

Description: 可综合的VerilogHDL设计实例 ---简化的RISC CPU设计简介-VerilogHDL comprehensive design example can be simplified RISC CPU design--- Introduction---
Platform: | Size: 697344 | Author: 李辉 | Hits:

[matlab] NUC501_datasheet_A1.4

Description: 适合使用NUVOTON nuc501 做开发的参考。-The NUC501 is an ARM7TDMI-based MCU, specifically designed to offer low-cost and high-performance for various applications, like interactive toys, edutainment robots, and home appliances. It integrates the 32-bit RISC CPU with 32KB high-speed SRAM, crypo engine with OTP key, boot ROM, LDO regulator, ADC, DAC, I2C, SPI, USB2.0 FS Device, & GPIO into a cost-affordable whil feature-rich micro-controller.
Platform: | Size: 1069056 | Author: wujiang | Hits:

[VHDL-FPGA-Verilog] sequencecontroller

Description: this is source code in verilog for sequence controller and clock generator which is used in RISC cpu
Platform: | Size: 99328 | Author: Harshit B J | Hits:

[SCM] MSP430F149

Description: The Texas Instruments MSP430 family of ultralow-power microcontrollers consist of several devices featuring different sets of peripherals targeted for various applications. The architecture, combined with five low power modes is optimized to achieve extended battery life in portable measurement applications. The device features a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that attribute to maximum code efficiency. The digitally controlled oscillator (DCO) allows wake-up from low-power modes to active mode in less than 6 μs.
Platform: | Size: 1013760 | Author: Ma | Hits:

[VHDL-FPGA-Verilog] risc8

Description: 基于verilog的8位risc-cpu源码，modelsim仿真-Verilog-based 8-bit risc-cpu source, modelsim simulation
Platform: | Size: 618496 | Author: 文婷 | Hits:

[VHDL-FPGA-Verilog] risc

Description: 16位cpu的各功能模块的源程序，经过FPGA仿真通过，希望能帮到你-16-bit cpu' s each functional module of the source, through the FPGA emulation by, hope you can help
Platform: | Size: 375808 | Author: 大成 | Hits:

[Software Engineering] NUC501PDF

Description: NUC501中文版PDF,对使用NUC501有帮助。-The NUC501 is an ARM7TDMI-based MCU, specifically designed to offer low-cost and high-performance for various applications, like interactive toys, edutainment robots, and home appliances. It integrates the 32-bit RISC CPU with 32KB high-speed SRAM, crypo engine with OTP key, boot ROM, LDO regulator, ADC, DAC, I2C, SPI, USB2.0 FS Device, & GPIO into a cost-affordable whil feature-rich micro-controller
Platform: | Size: 978944 | Author: WINSON | Hits:

[SCM] 16F716[CH]

Description: 单片机内核特征： • 高性能RISC CPU • 只有35 条单字节指令 - 除了程序分支指令为双周期指令外，其它所有指令均为单周期指令 • 工作速度：DC - 20 MHz 时钟输入 DC - 200 ns 指令周期 • 中断能力（多达7 个内部/ 外部中断源） • 8级深度硬件堆栈 • 直接、间接和相对寻址方式特殊单片机特征： • 上电复位（POR） • 上电延时定时器（PWRT）和振荡器起振定时器（OST） • 看门狗定时器（WDT），带片内RC 振荡器，确保可靠工作 • 双阈值欠压复位电路 - 2.5 VBOR （典型值） - 4.0 VBOR （典型值） • 可编程代码保护 • 降低功耗的休眠模式 • 可选择不同的振荡器工作模式 • 全静态设计 • 在线串行编程（In-Circuit Serial Programming-In-Circuit Serial Programming
Platform: | Size: 1291264 | Author: fei | Hits:

[VHDL-FPGA-Verilog] tiny64_latest.tar

Description: Description Tiny64 A 64-Bit RISC CPU with minial resource usage. Every opcode is executed in 2 clock cycles. The word size is configurable via XLEN from 32 up to the FPGA limit. The assembler supports also differnet word sizes. Due simplicity TinyX supports no interrupts, cache, MMU, FPU. Interrupts may supported in the future.
Platform: | Size: 22528 | Author: Andrey | Hits:

[VHDL-FPGA-Verilog] cpu

Description: 实现了简单的精简指令集的CPU,里面带着原码-Create a Cpu of RISC
Platform: | Size: 137216 | Author: 赵青波 | Hits:

[VHDL-FPGA-Verilog] 8_RISC_CPU

Description: risc-cpu，简单的cpu设计,强大的功能简洁的设计，精简化-verilog risc_cpu
Platform: | Size: 9216 | Author: 王侠 | Hits:

[VHDL-FPGA-Verilog] clk_gen.v

Description: 时钟发生器，用计数器功能编写的，能更好的潜入模块中,risc-cpu的一部分-clk_gen verilog
Platform: | Size: 3137536 | Author: 王侠 | Hits:

[VHDL-FPGA-Verilog] RISC_CPU

Description: 关于risc cpu 的pdf 希望对学习Risc cpu的人有用-Hope that the study of Risc cpu risc cpu pdf
Platform: | Size: 652288 | Author: sssss | Hits:

[VHDL-FPGA-Verilog] risc_cpu-OK

Description: 夏宇闻 verilog数字系统设计教程源码第二版，实现了简单的RISC CPU。印刷版有误，已改正。- A simple RISC CPU Verilog HDL source code. Work well.
Platform: | Size: 9216 | Author: Jian SUN | Hits:

[VHDL-FPGA-Verilog] pic10_verilog

Description: 用verilog实现了PIC10系列单片机的IP核，代码基本来自一篇国外的文章《A Microchip PIC-Compatible RISC CPU IP Core Design and Verilog Implementation》，对一部分进行了改进，主要包括对原文中有一些不可综合的@（posedge clk）语句的改写，使其能通过quartus的编译和综合，并且对跳转部分增加了比较多的注释，这篇文章写得非常好，感谢这篇文章的作者John Gulbrandsen先生，这篇文章让我学到了很多-PIC10 CPU IP Core Verilog Implementation reference:John Gulbrandsen 《A Microchip PIC-Compatible RISC CPU IP Core Design and Verilog Implementation》
Platform: | Size: 3459072 | Author: panpan | Hits:

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[Other] risc

[Other] PipelineCPU

[uCOS] s1c33_uCos

[Technology Management] cpudeliushuixianjiegou

[VHDL-FPGA-Verilog] RISC_CPU

[VHDL-FPGA-Verilog] VerilogHDLexample

[matlab] NUC501_datasheet_A1.4

[VHDL-FPGA-Verilog] sequencecontroller

[SCM] MSP430F149

[VHDL-FPGA-Verilog] risc8

[VHDL-FPGA-Verilog] risc

[Software Engineering] NUC501PDF

[SCM] 16F716[CH]

[VHDL-FPGA-Verilog] tiny64_latest.tar

[VHDL-FPGA-Verilog] cpu

[VHDL-FPGA-Verilog] 8_RISC_CPU

[VHDL-FPGA-Verilog] clk_gen.v

[VHDL-FPGA-Verilog] RISC_CPU

[VHDL-FPGA-Verilog] risc_cpu-OK

[VHDL-FPGA-Verilog] pic10_verilog

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